The present invention relates to a solid-state image pickup device and, more particularly, to a solid-state image pickup device comprising pixels arranged in two dimensions.
A two-dimensional solid-state image pickup device in which pixels each including a photoelectric converting element such as a photodiode and means for drawing out photoelectric charges generated in the photoelectric converting element onto an output signal line are arranged to form a matrix (with rows and columns) has had a wide variety of applications. Such solid-state image pickup devices can be subdivided into a CCD type and a MOS type depending on the means for reading out (drawing out) the photoelectric charges generated in the photoelectric converting element. A CCD image pickup device has the drawback of a narrow dynamic range due to the photoelectric charges which are transferred while being accumulated in potential wells. In a MOS image pickup device, on the other hand, charges accumulated in the pn junction capacitance of a photodiode are read out via a MOS transistor.
Referring to. FIG. 24, the structure of each pixel in a conventional MOS solid-state image pickup device will be described. In the drawing, a photodiode PD has a cathode connected to the gate of a MOS transistor T1 and to the drain of a MOS transistor T2. The MOS transistor T1 has a source connected to the drain of a MOS transistor T3 which has a source connected to an output signal line Vout. A direct-current voltage VDD is applied to the drain of the MOS transistor T1, while a direct-current voltage Vss is applied to the source of the MOS transistor T2 and to the anode of the photodiode.
When the photodiode PD is irradiated with light, photoelectric charges are generated and accumulated at the gate of the MOS transistor T1. When the MOS transistor T3 is turned ON with the application of a pulse to the gate thereof, an electric current proportional to the charges at the gate of the MOS transistor T1 is led out onto the output signal line through the MOS transistors T1 and T3, whereby an output current proportional to the quantity of incident light is read out. After the reading of a signal, the MOS transistor T3 is turned OFF and the MOS transistor T2 is turned ON, which initializes the gate voltage of the MOS transistor T1.
Thus, in the conventional MOS solid-state image pickup device, the photoelectric charge generated in the photodiode and accumulated at the gate of the MOS transistor are read from each of the pixels without any alterations thereto so that the output signal has a narrow dynamic range and contains a variable component and noise component of light from the power source. Moreover, since the output signal is on a low level, the conventional MOS image pickup device is disadvantageous in that the S/N ratio is low and a high-quality image pickup signal cannot be obtained therefrom.
It is therefore an object of the present invention, to provide a solid-state image pickup device capable of producing a high output from a pixel. Another object of the present invention is to provide a solid-state image pickup device capable of generating an image pickup signal with an excellent S/N ratio. Still another object of the present invention is to provide a solid-state image pickup device with a wide dynamic range.
These and other objects of the present invention are achieved by a two-dimensional solid-state image pickup device having a plurality of pixels arranged to form a matrix, each of the pixels comprising: photoelectric converting means; a capacitor for integrating an output signal from the photoelectric converting means; an amplifier for amplifying the voltage of an output from the capacitor; and a lead-out path for leading out the amplified voltage onto an output signal line.
In this arrangement, the output signal from the photoelectric converting means is integrated in the capacitor so that the variable component and high frequency noise of light from the light source contained in the output signal is absorbed in the capacitor and removed from the output signal. The output signal from the photoelectric converting means from which the variable component and high frequency noise have been removed is further voltage-amplified by the amplifier to have a sufficient magnitude and then outputted, resulting in an image pickup signal with excellent sensitivity. Moreover, since each pixel is provided with the photoelectric converting means, the capacitor, the amplifier, and the lead-out means, a signal can be read more stably and more accurately.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device having a plurality of pixels arranged to form a matrix, each of the pixels comprising: a photoelectric converting element; logarithmic converting means for changing an output current from the photoelectric converting element into a logarithmically converted voltage; a transistor having a first electrode, a second electrode, and a control electrode, the output voltage from the logarithmic converting means being applied to the control electrode; a capacitor having one terminal connected to receive an output current from the second electrode of the transistor; an amplifier for amplifying the voltage of an output from the capacitor; and a lead-out path for leading out the amplified voltage onto an output signal line.
In this arrangement, the output signal from the photoelectric converting means is integrated in the capacitor so that the variable component and high frequency noise of light from the light source contained in the output signal is absorbed in the capacitor and removed from the output signal. The output signal from the photoelectric converting means from which the varying component and high frequency noise have been removed is further voltage-amplified by the amplifier to have a sufficient magnitude and then outputted, resulting in an image pickup signal with excellent sensitivity. Moreover, logarithmic compression conversion achieves a wider dynamic range in the solid-state image pickup device in the arrangement.
The amplifier may include: an amplifier transistor having a first electrode, a second electrode, and a control electrode to which the output from the capacitor is applied; and a load resistor connected to an output line leading to the second electrode of the amplifier transistor. The load resistor may be used in common by several pixels. Hence, the load resistors may be smaller in total number than the pixels. In the case of using the amplifier transistor the lead-out path is appropriately connected to the second electrode of the amplifier transistor such that a signal is led out from the second electrode.
A transistor having a first electrode connected to the second electrode of the amplifier transistor, a second electrode connected to a direct-current voltage, and a control electrode connected to a direct-current voltage may be used as the load resistor (hereinafter referred to as xe2x80x9cresistor transistorxe2x80x9d). Additionally, a MOS transistor may be used as the amplifier transistor. In the case of using an n-channel MOS transistor the direct-current voltage applied to the first electrode of the amplifier transistor is properly set lower in potential than the direct-current voltage connected to the second electrode of the resistor transistor.
In the case of using a p-channel MOS transistor as the amplifier transistor, the direct-current voltage applied to the first electrode of the amplifier transistor is properly set higher in potential than the direct-current voltage connected to the second electrode of the resistor transistor. The lead-out path to be used may include a switch for sequentially selecting a specified one of all the pixels and leading out the amplified voltage from the selected pixel onto the output signal line.
The present invention also includes the provision of a second capacitor for performing signal integration while the output from the first capacitor is being led out. Thus, the second capacitor enables signal integration in the second capacitor simultaneously with the reading of the signal from the first capacitor and thereby provides compatibility with the shooting of a dynamic picture.
The present invention also contemplates that the current input path to the capacitor is provided with a switch to be controlled simultaneously in each of the pixels so that the signal integration time for each of the pixels will be equal. Thus, there is no time lag between the reading of charges accumulated in the capacitors in one column and the reading of charges accumulated in the capacitors in another column so that the integration time in the capacitor (as well as the timing for integration) is equal in each of the pixels. Consequently, signals are free from any error due to a time lag between the reading of the signal from one pixel and the reading of the signal from another pixel.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device having a plurality of pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor and a first electrode connected to a direct-current voltage, the second MOS transistor operating in the subthreshold region; a capacitor having one terminal connected to a second electrode of the second MOS transistor and the other terminal connected to a direct-current voltage, the capacitor integrating a signal based on photoelectric charges generated in the photodiode; a third MOS transistor having a gate electrode connected to the one terminal of the capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; a fourth MOS transistor having a first electrode connected to the one terminal of the capacitor and a second electrode connected to a direct-current voltage, the fourth MOS transistor being turned ON in response to a reset signal inputted to a gate electrode thereof to reset the capacitor to an initial state; and a fifth MOS transistor for read operation having a first electrode connected to a second electrode of the third MOS transistor, a second electrode connected to an output signal line, and a gate electrode connected to a column select line.
In this arrangement, the photoelectric current that is generated in the photodiode is logarithmically converted in the first MOS transistor so that the gate voltage of the first MOS transistor becomes proportional to the photocurrent through the logarithmic conversion. The capacitor is then charged with the gate voltage through the second MOS transistor. At the completion of integration, the fifth MOS transistor is turned ON and the output based on charges in the capacitor is voltage-amplified by the third MOS transistor and led out onto the output signal line. After the capacitor voltage is read out onto the output signal line, a reset pulse is applied to the gate of the fourth MOS transistor and the voltage on the capacitor is initialized so that integration of a signal in the capacitor can be initiated again.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device having a plurality of pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor, the second MOS transistor operating in the subthreshold region; a capacitor having one terminal connected to a second electrode of the second MOS transistor and the other terminal connected to a direct-current voltage, the capacitor being reset via the second MOS transistor when a reset voltage is applied to a first electrode of the second MOS transistor; a third MOS transistor having a gate electrode connected to the one terminal of the capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; and a fifth MOS transistor for selecting a read operation having a first electrode connected to a second electrode of the third MOS transistor, a second electrode connected to an output signal line and a gate electrode connected to a column select line.
In this arrangement, the integration in the capacitor and the reading of the voltage from the capacitor are performed similarly to the foregoing case. However, the resetting of the capacitor is performed by releasing the charges from the capacitor through the second MOS transistor when the reset voltage is applied to the first electrode of the second MOS transistor.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device comprising pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor and a first electrode connected to a direct-current voltage, the second MOS transistor operating in the subthreshold region; a capacitor having one terminal connected to a second electrode of the second MOS transistor and the other terminal connected to a direct-current voltage, the capacitor integrating a signal based on photoelectric charges generated in the photodiode; a third MOS transistor having a gate electrode connected to the one terminal of the capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; a fourth MOS transistor having a first electrode connected to the one terminal of the capacitor and a second electrode connected to a direct-current voltage, the fourth MOS transistor being constantly in the ON state with a direct-current voltage applied to a gate electrode thereof; and a fifth MOS transistor for selecting a read operation having a first electrode connected to a second electrode of the third MOS transistor, a second electrode connected to an output signal line, and a gate electrode connected to a column select line.
In this arrangement, the fourth MOS transistor that is constantly in the ON state is equivalent to a resistor so that a resistor having a specified value is connected to the capacitor. Accordingly, the initial value of the capacitor is determined by the resistor. In other words, the initial value on the capacitor can be adjusted by varying the direct-current voltage applied to the gate electrode of the fourth MOS transistor.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device comprising pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor and a first electrode connected to a direct-current voltage, the second MOS transistor operating in the subthreshold region; a sixth MOS transistor having a first electrode connected to a second electrode of the second MOS transistor and a gate electrode to which a switching voltage is applied; a capacitor having one terminal connected to a second electrode of the sixth MOS transistor and the other terminal connected to a direct-current voltage, the capacitor integrating a signal based on a photoelectric current generated in the photodiode; a third MOS transistor having a gate electrode connected to the one terminal of the capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; a fourth MOS transistor having a first electrode connected to the one terminal of the capacitor and a second electrode connected to a direct-current voltage, the fourth MOS transistor being turned ON in response to a reset signal inputted to a gate electrode thereof to reset the capacitor to an initial state; and a fifth MOS transistor for selecting a read operation having a first electrode connected to a second electrode of the third MOS transistor, a second electrode connected to an output signal line and a gate electrode connected to a column select line, wherein a voltage on the capacitor is amplified by the third MOS transistor and read out after halting integration in the capacitor by turning OFF the sixth MOS transistor.
In this arrangement, the integration time in each of the pixels is equalized by simultaneously controlling the sixth MOS transistor of each of the pixels.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device having a plurality of pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor and a first electrode to which a clock is applied, the second MOS transistor operating in the subthreshold region; a capacitor having one terminal connected to a second electrode of the second MOS transistor via a first switch and the other terminal connected to a direct-current voltage, the capacitor integrating a signal based on a photoelectric current generated in the photodiode; a third MOS transistor having a gate electrode connected to the one terminal of the capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; and a second switch having one terminal connected to a second electrode of the third MOS transistor and the other terminal connected to an output signal line, wherein the first switch is turned ON to supply an output current from the second MOS transistor to the capacitor and thereby integrate the signal, the second switch is turned ON after the first switch is turned OFF to amplify the voltage of the signal from the capacitor by means of the third MOS transistor and lead out the signal at the amplified voltage onto the output signal line, and then the first switch is turned ON, and the second switch is turned OFF, to initialize the capacitor through the second MOS transistor and the first switch during the period during which the clock applied to the first electrode of the second MOS transistor is at a reset voltage.
In this arrangement, the capacitor is initialized (reset) by releasing a charge from the capacitor through the first switch and the second MOS transistor.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device having a plurality of pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor and a first electrode to which a clock is applied, the second MOS transistor operating in the subthreshold region; a capacitor having one terminal connected to a second electrode of the second MOS transistor via a first switch and the other terminal connected to a direct-current voltage, the capacitor integrating a signal based on a photoelectric current generated in the photodiode; a third MOS transistor having a gate electrode connected to the one terminal of the capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; a fourth MOS transistor having one electrode connected to the one terminal of the capacitor, the other electrode connected to a direct-current voltage and a gate electrode for receiving a reset signal; and a second switch having one terminal connected to a second electrode of the third MOS transistor and the other terminal connected to an output signal line, wherein a pn junction capacitance related to a second electrode of the second MOS transistor is reset during a period during which a clock applied to the second electrode of the second MOS transistor is on a reset-voltage level while the voltage of the signal from the capacitor is amplified by the third MOS transistor and read onto the output signal line by turning OFF the and read onto the output signal line by turning OFF the first switch, integration of the signal in the pn junction capacitance is initiated during the period during which the clock is on the other level, and the first switch is turned ON after the reading of the signal from the capacitor is completed to transfer charges accumulated in the pn junction capacitance to the capacitor and continue integration in the capacitor.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device having a plurality of pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor and a first electrode to which a direct-current voltage is applied, the second MOS transistor operating in the subthreshold region; a first capacitor having one terminal connected to a second electrode of the second MOS transistor and the other terminal connected to a direct-current voltage, the first capacitor integrating a signal based on a photoelectric current generated in the photodiode; a first switch having one terminal connected to the one terminal of the first capacitor; a second capacitor having one terminal connected to the other terminal of the first switch and the other terminal connected to a direct-current voltage; a third MOS transistor having a gate electrode connected to the one terminal of the second capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; a fourth MOS transistor having a first electrode connected to the one terminal of the second capacitor, a second electrode connected to a direct-current voltage, and a gate electrode for receiving a reset signal; and a second switch having one terminal connected to a second electrode of the third MOS transistor and the other terminal connected to an output signal line, wherein a subsequent integration is initiated in the first capacitor while the voltage of a signal from the second capacitor is amplified by the third MOS transistor and read onto the output signal line by turning OFF the first switch, the fourth MOS transistor is turned ON to reset the second capacitor after the completion of the read operation, and then the first switch is turned ON to transfer charges from the first capacitor to the second capacitor and continue integration in the second capacitor.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device comprising pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor and a first electrode to which a clock is applied, the second MOS transistor operating in the subthreshold region; a first capacitor having one terminal connected to a second electrode of the second MOS transistor and the other terminal connected to a direct-current voltage, the first capacitor integrating a signal based on a photoelectric current generated in the photodiode; a first switch having one terminal connected to the one terminal of the first capacitor; a second capacitor having one terminal connected to the other terminal of the first switch and the other terminal connected to a direct-current voltage; a third MOS transistor having a gate electrode connected to the one terminal of the second capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; and a second switch having one terminal connected to a second electrode of the third MOS transistor and the other terminal connected to an output signal line, wherein the voltage integrated in the first capacitor is transferred to the second capacitor by turning ON the first switch to reset the first capacitor and then the subsequent integration is performed in the first capacitor while the voltage based on the charges in the second capacitor is amplified by the third MOS transistor and read onto the output signal line by turning OFF the first switch.
The objects of the present invention may also be achieved by a two-dimensional solid-state image pickup device having a plurality of pixels arranged to form a matrix, each of the pixels comprising: a photodiode; a first MOS transistor having a first electrode and a gate electrode each connected to one electrode of the photodiode, the first MOS transistor operating in a subthreshold region; a second MOS transistor having a gate electrode connected to the gate electrode of the first MOS transistor and a first electrode to which a clock is applied, the second MOS transistor operating in the subthreshold region; a first capacitor having one terminal connected to a second electrode of the second MOS transistor and the other terminal connected to a direct-current voltage, the first capacitor integrating a signal based on a photoelectric current generated in the photodiode; a first switch having one terminal connected to the one terminal of the first capacitor; a second capacitor having one terminal connected to the other terminal of the first switch and the other terminal connected to a direct-current voltage; a third MOS transistor having a gate electrode connected to the one terminal of the second capacitor and a first electrode connected to a direct-current voltage, the third MOS transistor operating as an amplifier; a fourth MOS transistor having a first electrode connected to the one terminal of the second capacitor, a second electrode connected to a direct-current voltage and a gate electrode to which a reset voltage is applied; and a second switch having one terminal connected to a second electrode of the third MOS transistor and the other terminal connected to an output signal line, wherein the first capacitor is reset during a period during which the clock applied to the second electrode of the second MOS transistor is on a reset-voltage level while the voltage of a signal from the second capacitor is amplified by the third MOS transistor by turning OFF the first switch, integration in the first capacitor is initiated during the period during which the clock is on the other level, the fourth MOS transistor is turned ON to reset the second capacitor after the completion of read operation, and then the first switch is turned ON to transfer charges from the first capacitor to the second capacitor and continue the integration in the second capacitor.
The objects of the present invention may also be achieved by the solid-state image pickup device previously described, further comprising MOS transistors connected to the individual pixels, each of the MOS transistors being connected to the corresponding pixel via the output signal line to serve as a load resistor to the third MOS transistor on the drain side of the third MOS transistor.
The MOS resistor transistors may further be provided for the individual rows forming the matrix of the pixels, each of the resistor MOS transistors having a first electrode connected to the fifth MOS transistor or second switch of each of the pixels arranged in the corresponding row, a second electrode connected to a direct-current voltage, and a gate electrode connected to a direct-current voltage.